DS2117M ultra2 lvd/se scsi terminator DS2117M product preview 063098 1/8 features ? fully compliant with ultra2 scsi ? provides multimode low voltage differential/single ended (lvd/se) termination for 9 signal line pairs ? autoselection of lvd or se termination ? 5% tolerance on se and lvd termination resistance ? low power down capacitance of 3 pf ? onboard thermal shutdown circuitry ? scsi bus hot plug compatible ? fully supports actively negated se scsi signals pin assignment DS2117Mb 36pin ssop 1 2 3 4 5 6 7 8 vref 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 nc nc r1p r1n r2p r2n hs gnd hs gnd hs gnd r3p r3n r4p r4n r5p r5n iso gnd tpwr hvd lvd se r9n r9p r8n r8p hs gnd hs gnd hs gnd r7n r7p r6n r6p diff_cap diffsense mstr/slv description the DS2117M ultra2 lvd/se scsi terminator is both a low voltage differential (lvd) and singleended (se) terminator. the multimode operation enables the designer to implement lvd in current products while allowing the enduser se backward compatibility with legacy devices. if the device is connected in an lvd only bus, the DS2117M will use lvd termination. if any se devices are connected to the bus, the DS2117M will use se termination. this is accomplished automatically inside the part by sensing the voltage on the scsi bus diffsens line. for the lvd termination, the DS2117M integrates two current sources with nine precision resistor strings. for the se termination, one regulator and nine precision 110 ohm resistors are used. three DS2117M termina- tors are needed for a wide scsi bus.
DS2117M 063098 2/8 reference documents scsi parallel interface 2 (spi2) {x310/1142d} scsi3 parallel interface (spi) {x3t10/855d} scsi3 fast20 {x3t10/1071d} scsi2 {x3.1311994} available from: global engineering documents 15 inverness way east englewood, co. 801125704 phone: (800) 8547179, (303) 7922181 fax: (303) 7922192 functional description the ds2117 combines lvd and se termination with diffsense sourcing and detection. a bandgap reference is fed into two amplifiers, which creates a 1.25v reference voltage and a 2.85v refer- ence voltage. the control logic determines which of these references will be applied to the termination resis- tors. if the scsi bus is in lvd mode, then the 1.25v ref- erence will be used. if the scsi bus is in se mode, then the 2.85v reference will be used. that same control logic will switch in/out parallel resistors to change the total termination resistance accordingly. finally, in se mode, the rp pins will be switched to ground. the diffsense circuitry decodes trinary logic. there will be one of three voltages on the scsi control line called diffsens. two comparators and a nand gate determine if the voltage is above 0.6v, below 2.15v, or in between. that indicates the mode of the bus to be hvd, se, or lvd, respectively. the DS2117M's diff_cap pin monitors the diff- sens line to determine the proper operating mode of the device; this mode is indicated by the se/lvd/hvd outputs. the diffsense pin can also drive the scsi diffsens line (when mstr/slv = 1) to determine the scsi bus operating mode. the DS2117M switches to the termination mode that is appropriate for the bus based on the value of the diffsens voltage. these modes are: lvd mode lvd termination is provided by a precision laser trimmed resistor string with two current sources. this configuration yields a 105 w differential and 150 w common mode impedance. a failsafe bias of 112 mv is maintained when no drivers are connected to the scsi bus. se mode when the external driver for a given signal line turns off, the active terminator will pull that signal line to 2.85 volts (quiescent state). when used with an active negation driver, the power amp can sink 22 ma per line while keeping the voltage reference in regula- tion. the terminating resistors maintain their 110 w value. hvd isolation mode the DS2117M identifies that there is an hvd (high voltage differential) device on the scsi bus and isolates the termination pins from the bus. when iso = 1, the termination pins are isolated from the scsi bus, and the bus mode indicators (se/lvd/hvd) as well as vref remains active. during thermal shut- down, the termination pins are isolated from the scsi bus and vref becomes high impedance. the diffsense driver is shut down during either of these two events. to ensure proper operation, the tpwr pin should be connected to the scsi bus termpwr line. as with all analog circuitry, the termpwr and vdd lines should be bypassed locally. a 2.2 m f capacitor and a 0.01 m f high frequency capacitor is recommended between tpwr and ground and placed as close as possible to the DS2117M. the DS2117M should be placed as close as possible to the scsi connector to minimize signal and power trace length, thereby resulting in less input capacitance and reflections which can degrade the bus signals. to maintain the specified regulation, a 4.7 m f capacitor is required between the vref pin (vref) and ground of each DS2117M. a high frequency cap (0.1 m f ceramic recommended) can also be placed on the vref pin in applications that use fast rise/fall time drivers. a typical scsi bus configuration is shown in figure 2. diffsens noise filtering the DS2117M incorporates a digital filter to remove high frequency transients on the diffsens control line thereby eliminating erroneous switching between modes. this filter eliminates the need for the external capacitor and resistor, which, heretofore, performed this function. the external filter may be used in addition to the digital filter if the DS2117M and ds2118m are to be used interchange- ably. note: diffsens refers to the scsi bus signal. diffsense refers to the dallas semiconductor pin name and internal circuitry relating to differential sensing.
DS2117M 063098 3/8 DS2117M block diagram figure 1 thermal shutdown circuitry control logic diffsense circuitry + bandgap reference + diff_cap se gnd driver mstr/slv iso se hvd lvd diffsense mux 52 w 52 w 2.85v rxp rxn se lvd hvd vref 1.25v
DS2117M 063098 4/8 scsi bus configuration figure 2 tpwr mstr/slv iso diffsense vref diff_cap control lines (9) tpwr mstr/slv iso diffsense vref diff_cap tpwr mstr/slv iso diffsense vref diff_cap tpwr mstr/slv iso tpwr mstr/slv iso tpwr mstr/slv iso diffsense diff_cap vref diffsense diff_cap vref diffsense diff_cap vref diffsens data lines (9) data lines (9) termpwr termpwr 4.7 m f 0.1 m f 4.7 m f 4.7 m f 20k 20k 4.7 m f 0.1 m f 4.7 m f 4.7 m f diffsense
DS2117M 063098 5/8 pin description table 1 pin symbol description 1 vref reference voltage. 2.85 volt reference in se mode and 1.25 volt reference in lvd mode; must be decoupled with a 4.7 m f cap. 2, 3 nc no connect. do not connect these pins. 47, 1116, 2225, 29 32 rxp rxn signal termination. connect to scsi bus signal lines. 8, 10, 26, 9, 28, 27 hs gnd heat sink ground. internally connected to the mounting pad. should be grounded. 17 iso isolation. when pulled high, the DS2117M isolates it's bus pins (rxp, rxn) from the scsi bus. 18 gnd ground. signal ground; 0.0 volts. 19 mstr/slv master/slave. mode select for the noncontrolling terminator. mstr enables the diffsense driver. 20 diffsense diffsense. output to drive the scsi bus diffsens line. 21 diff_cap diffsense capacitor. connect 0.1 m f capacitor for diffsense filter. input to detect the type of device (differential or singleended) on the scsi bus. 33 se singleended. se output of diffsense receiver; indicates se bus operation. 34 lvd low voltage differential. lvd output of diffsense receiver; indicates lvd bus operation. 35 hvd high voltage differential. hvd output of diffsense receiver; indicates hvd bus operation or thermal shutdown. 36 tpwr terminator power. connect to scsi bus termpwr line and decouple with 2.2 m f capacitor. recommended operating conditions parameter symbol min typ max units notes se mode termpower voltage lvd mode v tpwr (se) v tpwr (lvd) 3.0 2.7 5.5 5.5 v v logic 0 v il 0.3 +0.8 v logic 1 v ih 2.0 v tpwr + 0.3 v operating temperature v amb 0 70 c
DS2117M 063098 6/8 single ended characteristics parameter symbol min typ max units notes se termination resistance rse 104.5 110 115.5 ohms vline=0 3.0 volts se voltage reference vref 2.79 2.91 volts se output current lose 25.4 ma vline = 0.2 volts output capacitance cout 3 pf guaran- teed by design low voltage differential characteristics parameter symbol min typ max units notes differential mode termination resistance rdm 100 110 ohms common mode termination resistance rcm 110 190 ohms differential mode bias vdm 100 125 mv all lines open common mode bias vcm 1.125 1.375 v dc characteristics parameter symbol min typ max units notes termpower current i tpmr 35 ma all lines open input leakage high i ih 1.0 ua input leakage low i il 1.0 ua output current high i oh 1.0 ma v out = 2.4 volts; se/lvd/ hvd pins only output current low i ol 4.0 ma vout = 0.4 volts; se/lvd/ hvd pins only diffsens se operating range v seor 0.3 0.5 v diffsens lvd operating range v lvdor 0.7 1.9 v diffsens hvd operating range v hvdor 2.4 v tpwr + 0.3 v
DS2117M 063098 7/8 dc characteristics cont'd parameter symbol min typ max units notes diffsense driver output voltage v dso 1.2 1.4 v mstr/ slv=1; i ds =05 ma diffsense driver source current i dsh 5 15 ma mstr/ slv=1; v dso =0v diffsense driver sink current i dsl 20 200 ua mstr/ slv=1; v dso = 2.75 v regulator characteristics (0 c to 70 c) parameter symbol min typ max units notes line regulation li reg 1.0 2.0 % load regulation lo reg 1.3 3.0 % current limit i lim 350 ma sink current i sink 200 ma
DS2117M 063098 8/8 DS2117M 36pin ssop package
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